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Implementation of 4-Bit Braun Multiplier Using High Speed Full Adder
Author Name : Guduru Nandini, Dr.B.Sarala
ABSTRACT In Modern Digital World, Full Adders play a vital role in arthematic operations especially in digital signal processing, computer arithmetic, and data processing units. This paper presents the design and implementation of a high speed Full Adder, it consumes the low-power,high-performance and minimum figure of merit when compared to 23T full adder.The full adder design is implemented using 45nm CMOS technology. Full adders are fundamental building blocks in arithmetic circuits, and their efficiency directly impacts the overall performance and power consumption of digital systems.